MOS Memory Using Germanium Nanocrystals Formed by Thermal Oxidation of Si(1-x)Ge(x)

In this work, we propose a novel technique of fabricating germanium nanocrystal quasi-nonvolatile memory device. The device consists of a MOSFET with Ge charge-traps embedded within the gate dielectric. This trap-formation method provides for precise control of the thicknesses of the oxide layers which sandwich the charge-traps, via thermal oxidation. Memory devices with write/erase speed/voltage and retention time superior to previously reported nanocrystal memory devices were demonstrated. Introduction The Dynamic-Random-Access Memory (DRAM) is a major semiconductor product. The need for a large storage capacitor makes it difficult to scale the DRAM cell to higher storage density [1,2] The Flash Electrically Erasable Programmable Read-Only Memory employs a more compact memory-cell structure and hence can be scaled more easily, but its relatively slow write and erase times limit its application [3]. Nonvolatility (10-year data-retention time), is ensured by making the tunneling oxide thicker than 7nm. For some flash memory cell designs, the write speed can be greatly improved by using the hot-electron injection programming mechanism. The erase speed is however limited by the low tunneling current through the relatively thick tunneling oxide, so that erase times remain in the millisecond range [4]. Recently, single-transistor memory-cell structures with very thin tunnel oxide to increase write/erase speed at the expense of retention time were introduced [5,6]. Nanocrystal or nitride charge-storage sites embedded within the gate dielectric were proposed and demonstrated. In both cases, retention time longer than expected from floating gate device were observed for such thin oxides. The possibility of a charge-storage memory device which exceeds the performance limits of a conventional floatinggate device has attracted a great deal of interest and is spurring rapid progress in this area. Quasi-nonvolatile MOS memory devices employing silicon, germanium or tin nanocrystal charge-storage sites produced by ion implantation into the gate oxide, as well as oxide-nitride-oxide (ONO) memory devices, have been demonstrated in recent studies [5,8,9]. Devices with embedded silicon or germanium nanocrystals fabricated using ion implantation exhibited superior data-retention characteristics as compared with conventional floatinggate devices. Limitations of the ion implantation technique place a lower limit on the top control-oxide thickness. In addition, ion implantation can compromise the integrity of the control oxide. In this study, a new, novel technique for creating germanium charge-trap sites within the gate dielectric of a MOSFET is demonstrated. The top oxide, charge-trap sites, and the tunneling oxide are formed through the sequential thermal oxidation of Si1-xGex at various temperatures. The resulting memory device exhibits fast WRITE/ERASE speed, long data retention time and superior endurance with non-destructive read. Device Fabrication The schematic cross-section of a new charge-trap-based quasi-nonvolatile memory device is shown in Figure 1.